| commit | dec2aef7b83ede04d9da6e024ce3bbc5591182fc | [log] [tgz] |
|---|---|---|
| author | Liu Ying <Ying.Liu@freescale.com> | Sat Oct 06 04:16:04 2012 +0000 |
| committer | Anatolij Gustschin <agust@denx.de> | Tue Nov 06 22:24:11 2012 +0100 |
| tree | 6f8361c6771812663f2654467219bd7acd9dd513 | |
| parent | becc684a338f84c5c5fde296f28fc6d0c105b5b8 [diff] |
ipu common: reset ipuv3 correctly This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to high to reset IPUv3. This makes sure that IPUv3 finishes sofware reset. A timeout mechanism is added to stop polling on the bit status in case the bit could not be cleared by the hardware automatically within 10 millisecond. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>