Tegra: MMC: Add DT support to MMC driver for all T20 boards
tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc.
Tested on Seaboard, fully functional.
Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 665fa1c..babbe08 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -48,6 +48,9 @@
#ifdef CONFIG_USB_EHCI_TEGRA
#include <asm/arch-tegra/usb.h>
#endif
+#ifdef CONFIG_TEGRA_MMC
+#include <asm/arch-tegra/mmc.h>
+#endif
#include <i2c.h>
#include <spi.h>
#include "emc.h"
@@ -221,3 +224,25 @@
#endif
return 0;
}
+
+#if defined(CONFIG_TEGRA_MMC)
+void __pin_mux_mmc(void)
+{
+}
+
+void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
+
+/* this is a weak define that we are overriding */
+int board_mmc_init(bd_t *bd)
+{
+ debug("%s called\n", __func__);
+
+ /* Enable muxes, etc. for SDMMC controllers */
+ pin_mux_mmc();
+
+ debug("%s: init MMC\n", __func__);
+ tegra_mmc_init();
+
+ return 0;
+}
+#endif
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
index 93430ed..3122441 100644
--- a/board/nvidia/harmony/harmony.c
+++ b/board/nvidia/harmony/harmony.c
@@ -27,19 +27,14 @@
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/tegra.h>
-#include <asm/arch-tegra/mmc.h>
#include <asm/gpio.h>
-#ifdef CONFIG_TEGRA_MMC
-#include <mmc.h>
-#endif
-
#ifdef CONFIG_TEGRA_MMC
/*
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
-static void pin_mux_mmc(void)
+void pin_mux_mmc(void)
{
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT);
@@ -54,25 +49,6 @@
/* For CD GPIO PI5 */
pinmux_tristate_disable(PINGRP_ATC);
}
-
-/* this is a weak define that we are overriding */
-int board_mmc_init(bd_t *bd)
-{
- debug("board_mmc_init called\n");
-
- /* Enable muxes, etc. for SDMMC controllers */
- pin_mux_mmc();
-
- debug("board_mmc_init: init SD slot J26\n");
- /* init dev 0, SD slot J26, with 8-bit bus */
- tegra_mmc_init(0, 8, GPIO_PI6, GPIO_PH2);
-
- debug("board_mmc_init: init SD slot J5\n");
- /* init dev 2, SD slot J5, with 4-bit bus */
- tegra_mmc_init(2, 4, GPIO_PT3, GPIO_PI5);
-
- return 0;
-}
#endif
void pin_mux_usb(void)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index 3e33da0..e581fdd 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -28,11 +28,7 @@
#include <asm/arch/funcmux.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
-#include <asm/arch-tegra/mmc.h>
#include <asm/gpio.h>
-#ifdef CONFIG_TEGRA_MMC
-#include <mmc.h>
-#endif
/* TODO: Remove this code when the SPI switch is working */
#if !defined(CONFIG_SPI_UART_SWITCH) && (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA)
@@ -51,7 +47,7 @@
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
-static void pin_mux_mmc(void)
+void pin_mux_mmc(void)
{
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);
@@ -61,25 +57,6 @@
/* For CD GPIO PI5 */
pinmux_tristate_disable(PINGRP_ATC);
}
-
-/* this is a weak define that we are overriding */
-int board_mmc_init(bd_t *bd)
-{
- debug("board_mmc_init called\n");
-
- /* Enable muxes, etc. for SDMMC controllers */
- pin_mux_mmc();
-
- debug("board_mmc_init: init eMMC\n");
- /* init dev 0, eMMC chip, with 8-bit bus */
- tegra_mmc_init(0, 8, -1, -1);
-
- debug("board_mmc_init: init SD slot\n");
- /* init dev 1, SD slot, with 4-bit bus */
- tegra_mmc_init(1, 4, GPIO_PI6, GPIO_PI5);
-
- return 0;
-}
#endif
void pin_mux_usb(void)
diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c
index 592cd6b..f18aa27 100644
--- a/board/nvidia/whistler/whistler.c
+++ b/board/nvidia/whistler/whistler.c
@@ -27,32 +27,19 @@
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
-#include <asm/arch-tegra/mmc.h>
#include <asm/gpio.h>
#include <i2c.h>
-#ifdef CONFIG_TEGRA_MMC
-#include <mmc.h>
-#endif
-
+#ifdef CONFIG_TEGRA_MMC
/*
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
-static void pin_mux_mmc(void)
-{
- funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT);
- funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT);
-}
-
-/* this is a weak define that we are overriding */
-int board_mmc_init(bd_t *bd)
+void pin_mux_mmc(void)
{
uchar val;
int ret;
- debug("board_mmc_init called\n");
-
/* Turn on MAX8907B LDO12 to 2.8V for J40 power */
ret = i2c_set_bus_num(0);
if (ret)
@@ -70,17 +57,10 @@
if (ret)
printf("i2c_write 0 0x3c 0x44 failed: %d\n", ret);
- /* Enable muxes, etc. for SDMMC controllers */
- pin_mux_mmc();
-
- /* init dev 0 (SDMMC4), (J29 "HSMMC") with 8-bit bus */
- tegra_mmc_init(0, 8, -1, -1);
-
- /* init dev 1 (SDMMC3), (J40 "SDIO3") with 8-bit bus */
- tegra_mmc_init(1, 8, -1, -1);
-
- return 0;
+ funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT);
+ funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT);
}
+#endif
/* this is a weak define that we are overriding */
void pin_mux_usb(void)