| commit | 97393d6fac693adf4844acb67b90f669fbf88add | [log] [tgz] |
|---|---|---|
| author | Ashish Kumar <Ashish.Kumar@nxp.com> | Fri Aug 18 10:54:36 2017 +0530 |
| committer | York Sun <york.sun@nxp.com> | Mon Sep 11 07:55:36 2017 -0700 |
| tree | b59727a8075cfc4b7375f3686b38581f9de9d466 | |
| parent | a058b8a24ac7ca87abb1438aaedcb9781e44ccc2 [diff] |
armv8: fsl-lsch3: Make CCN-504 related code conditional LS2080 family has CCN-504 cache coherent interconnet. Other SoCs in LSCH3 family may have differnt interconnect. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>