tree 68308063e00f4b803a07b9f55d56b2973edc2c7b
parent dc59780c7d676a8fffe45954ac5821b2c948e775
author Bin Meng <bmeng.cn@gmail.com> 1444624664 -0700
committer Simon Glass <sjg@chromium.org> 1445435187 -0600

x86: Enable mrc cache for bayleybay and minnowmax

Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).

Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>