Timer: Remove reset_timer_masked()
In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
diff --git a/arch/arm/cpu/armv7/mx5/timer.c b/arch/arm/cpu/armv7/mx5/timer.c
index 4525beb..2544b08 100644
--- a/arch/arm/cpu/armv7/mx5/timer.c
+++ b/arch/arm/cpu/armv7/mx5/timer.c
@@ -52,6 +52,7 @@
int timer_init(void)
{
int i;
+ ulong val;
/* setup GP Timer 1 */
__raw_writel(GPTCR_SWR, &cur_gpt->control);
@@ -65,15 +66,12 @@
/* Freerun Mode, PERCLK1 input */
i = __raw_readl(&cur_gpt->control);
__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
- reset_timer_masked();
- return 0;
-}
-void reset_timer_masked(void)
-{
- ulong val = __raw_readl(&cur_gpt->counter);
+ val = __raw_readl(&cur_gpt->counter);
lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
timestamp = 0;
+
+ return 0;
}
ulong get_timer_masked(void)
diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c
index 4756e26..9f8bc93 100644
--- a/arch/arm/cpu/armv7/omap-common/timer.c
+++ b/arch/arm/cpu/armv7/omap-common/timer.c
@@ -55,7 +55,9 @@
writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
&timer_base->tclr);
- reset_timer_masked(); /* init the timestamp and lastinc value */
+ /* reset time, capture current incrementer value time */
+ gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
+ gd->tbl = 0; /* start "advancing" time stamp from 0 */
return 0;
}
@@ -84,13 +86,6 @@
}
}
-void reset_timer_masked(void)
-{
- /* reset time, capture current incrementer value time */
- gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
- gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
ulong get_timer_masked(void)
{
/* current tick value */
diff --git a/arch/arm/cpu/armv7/tegra2/timer.c b/arch/arm/cpu/armv7/tegra2/timer.c
index 2761c12..0b9fa64 100644
--- a/arch/arm/cpu/armv7/tegra2/timer.c
+++ b/arch/arm/cpu/armv7/tegra2/timer.c
@@ -69,13 +69,6 @@
}
}
-void reset_timer_masked(void)
-{
- /* reset time, capture current incrementer value time */
- gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ);
- gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
ulong get_timer_masked(void)
{
ulong now;