[MPC512x] Streamline frame handling in the FEC driver
- convert frame size settings to be derived from a single base
- set frame size to the recommended default value
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
diff --git a/cpu/mpc512x/fec.c b/cpu/mpc512x/fec.c
index 8104576..675b7a2 100644
--- a/cpu/mpc512x/fec.c
+++ b/cpu/mpc512x/fec.c
@@ -32,7 +32,7 @@
int fec512x_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis);
-static uchar rx_buff[FEC_MAX_PKT_SIZE];
+static uchar rx_buff[FEC_BUFFER_SIZE];
static int rx_buff_idx = 0;
/********************************************************************/
@@ -237,8 +237,8 @@
/* Set Opcode/Pause Duration Register */
fec->eth->op_pause = 0x00010020;
- /* Frame length=1518; MII mode */
- fec->eth->r_cntrl = 0x05ee0024;
+ /* Frame length=1522; MII mode */
+ fec->eth->r_cntrl = (FEC_MAX_FRAME_LEN << 16) | 0x24;
/* Half-duplex, heartbeat disabled */
fec->eth->x_cntrl = 0x00000000;
@@ -248,7 +248,7 @@
/* Setup recv fifo start and buff size */
fec->eth->r_fstart = 0x500;
- fec->eth->r_buff_size = 0x5e0;
+ fec->eth->r_buff_size = FEC_BUFFER_SIZE;
/* Setup BD base addresses */
fec->eth->r_des_start = (uint32)fec->bdBase->rbd;
diff --git a/cpu/mpc512x/fec.h b/cpu/mpc512x/fec.h
index d2d877a..9c38502 100644
--- a/cpu/mpc512x/fec.h
+++ b/cpu/mpc512x/fec.h
@@ -164,10 +164,13 @@
#define FEC_RBD_NUM 32 /* The user can adjust this value */
/* packet size limit */
-#define FEC_MAX_PKT_SIZE 1536
+#define FEC_MAX_FRAME_LEN 1522 /* recommended default value */
+
+/* Buffer size must be evenly divisible by 16 */
+#define FEC_BUFFER_SIZE ((FEC_MAX_FRAME_LEN + 0x10) & (~0xf))
typedef struct {
- uint8 frame[FEC_MAX_PKT_SIZE];
+ uint8 frame[FEC_BUFFER_SIZE];
} mpc512x_frame;
typedef struct {