| commit | 93b9de610f4d579dde2fc2261e683db567289726 | [log] [tgz] |
|---|---|---|
| author | Zong Li <zong.li@sifive.com> | Wed Jun 30 23:23:50 2021 +0800 |
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | Tue Jul 06 20:24:26 2021 +0800 |
| tree | 62d2ac2c805629f26ab5f0709d7d4775020587ea | |
| parent | bab770a58c60038c4ed2010627bee5565581575e [diff] |
board: sifive: support spl multi-dtb on unmatched board There are two revisions of unmatched board with different DDR timing, we'd like to support multi-dtb mechanism in SPL, then it selects the right DTB at runtime according to PCB revision in I2C EEPROM. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>