diff --git a/doc/README.fsl-ddr b/doc/README.fsl-ddr
index 6e4f6e9..8c37bbe 100644
--- a/doc/README.fsl-ddr
+++ b/doc/README.fsl-ddr
@@ -27,6 +27,9 @@
  from each controller. {CS2+CS3} on each controller are only rank
  interleaved on that controller.
 
+ For memory controller interleaving, identical DIMMs are suggested. Software
+ doesn't check the size or organization of interleaved DIMMs.
+
 The ways to configure the ddr interleaving mode
 ==============================================
 1. In board header file(e.g.MPC8572DS.h), add default interleaving setting