commit 92e3d849925a873080213a402f3824c6675e6dba
author Tim Harvey <tharvey@gateworks.com> Wed Apr 08 12:54:59 2015 -0700
committer Stefano Babic <sbabic@denx.de> Wed Apr 22 14:39:11 2015 +0200
tree 687dd1e35c883486390cc290c87be8009c5bfb53
parent e4af5d3870c118e55ed878339797be94263025c1

imx: ventana: add 'gsc wd' command for enabling and disabling GSC watchdog

This adds information about the Gateworks System Controller to the gsc command
such as the firmware version, firmware CRC and status of the GSC watchdog
(if its enabled and if its tripped).

Additionally the 'gsc wd' command can be used to enable or disable the
watchdog with the following usage:
 gsc wd enable [30|60]
 gsc wd disable

Note that the GSC registers are battery-backed by the GSC coincell so once
eanbled, they remain enabled across power-cycles or until either the GSC
firmware has been updated or FLASH has been re-programmed by the Gateworks
JTAG adapter.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

board/gateworks/gw_ventana/gsc.c

diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
index a62f128..718e165 100644
--- a/board/gateworks/gw_ventana/gsc.c
+++ b/board/gateworks/gw_ventana/gsc.c
@@ -59,7 +59,6 @@
 	return ret;
 }
 
-#ifdef CONFIG_CMD_GSC
 static void read_hwmon(const char *name, uint reg, uint size)
 {
 	unsigned char buf[3];
@@ -78,11 +77,29 @@
 	}
 }
 
-int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int gsc_info(int verbose)
 {
 	const char *model = getenv("model");
+	unsigned char buf[16];
 
 	i2c_set_bus_num(0);
+	if (gsc_i2c_read(GSC_SC_ADDR, 0, 1, buf, 16))
+		return CMD_RET_FAILURE;
+
+	printf("GSC:   v%d", buf[GSC_SC_FWVER]);
+	printf(" 0x%04x", buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC+1]<<8);
+	printf(" WDT:%sabled", (buf[GSC_SC_CTRL1] & (1<<GSC_SC_CTRL1_WDEN))
+		? "en" : "dis");
+	if (buf[GSC_SC_STATUS] & (1 << GSC_SC_IRQ_WATCHDOG)) {
+		buf[GSC_SC_STATUS] &= ~(1 << GSC_SC_IRQ_WATCHDOG);
+		puts(" WDT_RESET");
+		gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1,
+			      &buf[GSC_SC_STATUS], 1);
+	}
+	puts("\n");
+	if (!verbose)
+		return CMD_RET_SUCCESS;
+
 	read_hwmon("Temp",     GSC_HWMON_TEMP, 2);
 	read_hwmon("VIN",      GSC_HWMON_VIN, 3);
 	read_hwmon("VBATT",    GSC_HWMON_VBATT, 3);
@@ -115,9 +132,60 @@
 	return 0;
 }
 
+#ifdef CONFIG_CMD_GSC
+static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	unsigned char reg;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	if (strcasecmp(argv[1], "enable") == 0) {
+		int timeout = 0;
+
+		if (argc > 2)
+			timeout = simple_strtoul(argv[2], NULL, 10);
+		i2c_set_bus_num(0);
+		if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+			return CMD_RET_FAILURE;
+		reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
+		if (timeout == 60)
+			reg |= (1 << GSC_SC_CTRL1_WDTIME);
+		else
+			timeout = 30;
+		reg |= (1 << GSC_SC_CTRL1_WDEN);
+		if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+			return CMD_RET_FAILURE;
+		printf("GSC Watchdog enabled with timeout=%d seconds\n",
+		       timeout);
+	} else if (strcasecmp(argv[1], "disable") == 0) {
+		i2c_set_bus_num(0);
+		if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+			return CMD_RET_FAILURE;
+		reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
+		if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+			return CMD_RET_FAILURE;
+		printf("GSC Watchdog disabled\n");
+	} else {
+		return CMD_RET_USAGE;
+	}
+	return CMD_RET_SUCCESS;
+}
+
+static int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	if (argc < 2)
+		return gsc_info(1);
+
+	if (strcasecmp(argv[1], "wd") == 0)
+		return do_gsc_wd(cmdtp, flag, --argc, ++argv);
+
+	return CMD_RET_USAGE;
+}
+
-U_BOOT_CMD(gsc, 1, 1, do_gsc,
-	   "GSC test",
-	   ""
-);
+U_BOOT_CMD(
+	gsc, 4, 1, do_gsc, "GSC configuration",
+	"[wd enable [30|60]]|[wd disable]\n"
+	);
 
 #endif /* CONFIG_CMD_GSC */