arm: socfpga: misc_s10: Fix EMAC register address calculation
Fix EMAC register address calculation, address need to multiply
with sizeof(u32) or 4.
This fixes write to invalid address.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index ccff78a..670bfa1 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -68,7 +68,7 @@
return -EINVAL;
clrsetbits_le32(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_EMAC0 +
- gmac_index,
+ (gmac_index * sizeof(u32)),
SYSMGR_EMACGRP_CTRL_PHYSEL_MASK, modereg);
return 0;