commit 904549ff2d33b5d13916b443d6b893b66f22f187
author Brad Griffis <bgriffis@ti.com> Mon Apr 29 09:59:32 2019 +0530
committer Tom Rini <trini@konsulko.com> Sun May 05 08:48:50 2019 -0400
tree 522ea4daf15f594b4dc3516a5ff7700928f9ea2c
parent d2e56a7964236584d90a41c21562a290b79e8b8d

arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36

for suspend/resume robustness

update value for ext_phy_ctrl_36 for suspend/resume robustness
with hardware leveling enabled.

Match recommended values from EMIF Tools app note:

http://www.ti.com/lit/an/sprac70/sprac70.pdf

Signed-off-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>

arch/arm/mach-omap2/am33xx/ddr.c

diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index c70b6fe..3fd1d08 100644
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -311,8 +311,8 @@
 	writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_34_shdw);
 	writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_35);
 	writel(0x00000000, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_35_shdw);
-	writel(0x000000FF, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36);
-	writel(0x000000FF, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw);
+	writel(0x00000077, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36);
+	writel(0x00000077, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw);
 
 	/*
 	 * Sequence to ensure that the PHY is again in a known state after