commit 8f0700c08f4285ffaa866933de7178afffec4c0d
author Michal Simek <michal.simek@xilinx.com> Wed Oct 17 12:16:12 2018 +0200
committer Michal Simek <michal.simek@xilinx.com> Wed Nov 07 10:07:31 2018 +0100
tree 915e01c99bc5346e74251e28e98315412a6df26f
parent 4443c5caf33ece7c3f512c2f5712b2a18e7fc350

arm: zynq: Setup non zero SPL FIT load address

Default setup is 0 which is incorrect place because it points to OCM
which is allocated for SPL only in our case.
Use address in DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

include/configs/zynq-common.h

diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 98411c4..864f322 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -290,6 +290,8 @@
 #define CONFIG_SPL_BSS_START_ADDR	0x100000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000
 
+#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
+
 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
 
 #endif /* __CONFIG_ZYNQ_COMMON_H */