commit 8e7ffc03999f91589358adf48cf959dd7e965408
author Fabio Estevam <festevam@gmail.com> Fri Dec 17 08:09:19 2021 -0300
committer Stefano Babic <sbabic@denx.de> Sat Feb 05 13:38:39 2022 +0100
tree 653b7cf45c8f265b9eb394182bb9cb88632f519a
parent 51390ba1bf5ee8e6e09fbe722acdc7dd7b63fe05

ARM: dts: imx6ull: Use the correct name for ESAI_TX0

According to the i.MX6ULL Reference Manual, pad CSI_DATA07 may
have the ESAI_TX0 functionality, not ESAI_T0.

Also, NXP's i.MX Config Tools 10.0 generates dtsi with the
MX6ULL_PAD_CSI_DATA07__ESAI_TX0 naming, so fix it accordingly.

There are no devicetree users in mainline that use the old name,
so just remove the old entry.

Fixes: f8ca22b8de32 ("arm: dts: imx6ull: add pinctrl defines")
Reported-by: George Makarov <georgemakarov1@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>

arch/arm/dts/imx6ull-pinfunc.h

diff --git a/arch/arm/dts/imx6ull-pinfunc.h b/arch/arm/dts/imx6ull-pinfunc.h
index eb025a9..7328d4e 100644
--- a/arch/arm/dts/imx6ull-pinfunc.h
+++ b/arch/arm/dts/imx6ull-pinfunc.h
@@ -82,6 +82,6 @@
 #define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS                         0x01F4 0x0480 0x0000 0x9 0x0
 #define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK                        0x01F8 0x0484 0x0000 0x9 0x0
 #define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0                       0x01FC 0x0488 0x0000 0x9 0x0
-#define MX6ULL_PAD_CSI_DATA07__ESAI_T0                            0x0200 0x048C 0x0000 0x9 0x0
+#define MX6ULL_PAD_CSI_DATA07__ESAI_TX0                           0x0200 0x048C 0x0000 0x9 0x0
 
 #endif /* __DTS_IMX6ULL_PINFUNC_H */