armv8/ls2085aqds: NAND boot support
This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/soc.c b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
index 17700ef..ca00108 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/soc.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
@@ -6,8 +6,13 @@
#include <common.h>
#include <fsl_ifc.h>
+#include <nand.h>
+#include <spl.h>
#include <asm/arch-fsl-lsch3/soc.h>
#include <asm/io.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
static void erratum_a008751(void)
{
@@ -18,8 +23,51 @@
#endif
}
+static void erratum_rcw_src(void)
+{
+#if defined(CONFIG_SPL)
+ u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
+ u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
+ u32 val;
+
+ val = in_le32(dcfg_ccsr + DCFG_PORSR1 / 4);
+ val &= ~DCFG_PORSR1_RCW_SRC;
+ val |= DCFG_PORSR1_RCW_SRC_NOR;
+ out_le32(dcfg_dcsr + DCFG_DCSR_PORCR1 / 4, val);
+#endif
+}
+
void fsl_lsch3_early_init_f(void)
{
erratum_a008751();
+ erratum_rcw_src();
init_early_memctl_regs(); /* tighten IFC timing */
}
+
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong dummy)
+{
+ /* Clear global data */
+ memset((void *)gd, 0, sizeof(gd_t));
+
+ arch_cpu_init();
+ board_early_init_f();
+ timer_init();
+ env_init();
+ gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
+
+ serial_init();
+ console_init_f();
+ dram_init();
+
+ /* Clear the BSS. */
+ memset(__bss_start, 0, __bss_end - __bss_start);
+
+ board_init_r(NULL, 0);
+}
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_NAND;
+}
+#endif