commit 8e4f3ff9da5b3be6437b3f8e7996701443708ccc
author Chunhe Lan <Chunhe.Lan@freescale.com> Mon Apr 14 18:42:06 2014 +0800
committer York Sun <yorksun@freescale.com> Tue May 13 08:24:32 2014 -0700
tree a41d9efce6c5a1fb70f580ef0014f14fb0a970e1
parent e1b6f4c68824b35efa22674dc611545efbc0ec7d

powerpc/85xx: Add T4240RDB board support

T4240RDB board Specification
----------------------------
Memory subsystem:
   6GB DDR3
   128MB NOR flash
   2GB NAND flash

Ethernet:
   Eight 1G SGMII ports
   Four 10Gbps SFP+ ports

PCIe:
   Two PCIe slots

USB:
   Two USB2.0 Type A ports

SDHC:
   One SD-card port

SATA:
   One SATA port

UART:
   Dual RJ45 ports

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]

board/freescale/t4rdb/t4_pbi.cfg

diff --git a/board/freescale/t4rdb/t4_pbi.cfg b/board/freescale/t4rdb/t4_pbi.cfg
new file mode 100644
index 0000000..c9f8ced
--- /dev/null
+++ b/board/freescale/t4rdb/t4_pbi.cfg
@@ -0,0 +1,31 @@
+#
+# Copyright 2014 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+#PBI commands
+#Initialize CPC1
+09010000 00200400
+09138000 00000000
+091380c0 00000100
+#512KB SRAM
+09010100 00000000
+09010104 fff80009
+09010f00 08000000
+#enable CPC1
+09010000 80000000
+#Configure LAW for CPC1
+09000d00 00000000
+09000d04 fff80000
+09000d08 81000012
+#slow mdio clock
+095fc030 00008148
+095fd030 00808148
+#Configure alternate space
+09000010 00000000
+09000014 ff000000
+09000018 81000000
+#Flush PBL data
+09138000 00000000
+091380c0 00000000