tree bfd980302022f2fe4ca4a328a6eb85ecba0d519e
parent 24c3e951d7a2485834e34926819db1f0713864bb
author Akshay Saraswat <akshay.s@samsung.com> 1401112086 +0530
committer Minkyu Kang <mk7.kang@samsung.com> 1402646713 +0900

Exynos5420: Remove code for enabling read leveling

This patch intends to remove all code which enables hardware read
leveling. All characterization environments may not cope up with
h/w read leveling enabled, so we must disable this.
Also, disabling h/w read leveling improves the MIF LVcc value
(LVcc value is the value at which DDR will fail to work properly).
Improving LVcc means we have enough voltage margin for MIF.
When h/w leveling is enabled, we have almost zero volatge margin.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>