| commit | 8dcbf81add2e35ec50d5fc1a234ff1ce7dd2695b | [log] [tgz] |
|---|---|---|
| author | Dario Binacchi <dario.binacchi@amarulasolutions.com> | Sat Nov 11 11:46:19 2023 +0100 |
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | Fri Dec 15 15:03:18 2023 +0100 |
| tree | 6d2885b4c07671f25aa7de80c040de8f9524674d | |
| parent | c447a080b50bee3272d620ff8ab1139bebdf4e20 [diff] |
clk: stm32f: fix setting of LCD clock
Set pllsaidivr only if the PLLSAIR output frequency is an exact multiple
of the pixel clock rate. Otherwise, we search through all combinations
of pllsaidivr * pllsair and use the one which gives the rate closest to
requested one.
Fixes: 5e993508cb25 ("clk: clk_stm32f: Add set_rate for LTDC clock")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>