commit 8ced050fa3ff9e6c6b6941731850693665f0cc52
author York Sun <yorksun@freescale.com> Tue Jan 06 13:18:55 2015 -0800
committer York Sun <yorksun@freescale.com> Tue Feb 24 13:09:42 2015 -0800
tree d2d58e20f9d05aabb5d1d12a4a91ef4cbbb545bd
parent 0080f2278fbbae67dffccb3bc1ecd0ef6ce7a433

driver/ddr/fsl: Add sync of refresh

Add sync of refresh for multiple DDR controllers. DDRC initialization
needs to complete first. Code is re-ordered to keep refresh close.

Signed-off-by: York Sun <yorksun@freescale.com>

README

diff --git a/README b/README
index ba57dc5..6800b95 100644
--- a/README
+++ b/README
@@ -4916,6 +4916,9 @@
 - CONFIG_FSL_DDR_INTERACTIVE
 		Enable interactive DDR debugging. See doc/README.fsl-ddr.
 
+- CONFIG_FSL_DDR_SYNC_REFRESH
+		Enable sync of refresh for multiple controllers.
+
 - CONFIG_SYS_83XX_DDR_USES_CS0
 		Only for 83xx systems. If specified, then DDR should
 		be configured using CS0 and CS1 instead of CS2 and CS3.