tree 1537649316d30b38f942321e83be20f6f47df84f
parent 1a35f3dc44f6117769f924a3c93f1dec5dc7e71e
author Haiying Wang <Haiying.Wang@freescale.com> 1297409130 -0600
committer Kumar Gala <galak@kernel.crashing.org> 1302016719 -0500

powerpc/85xx: Add P1021 specific QE and UEC support

P1021 has some QE pins which need to be set in pmuxcr register before
using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and
UCC5 in Eth mode.  QE9 and QE12 are set for MII management. QE12 needs to
be released after MII access because QE12 pin is muxed with LBCTL signal.

Also added relevant QE support defines unique to P1021.

The P1021 QE is shared on P1012, P1016, and P1025.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>