mpc8xx: remove fads board support
These boards are old enough and have no maintainers.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
diff --git a/arch/powerpc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S
index b1fb062..55238df 100644
--- a/arch/powerpc/cpu/mpc824x/start.S
+++ b/arch/powerpc/cpu/mpc824x/start.S
@@ -56,9 +56,6 @@
GOT_ENTRY(__init_end)
GOT_ENTRY(__bss_end)
GOT_ENTRY(__bss_start)
-#if defined(CONFIG_FADS)
- GOT_ENTRY(environment)
-#endif
END_GOT
/*
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 5c96b5f..eb4432f 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -97,14 +97,8 @@
pre = 'M'; m = 1;
if (id_str == NULL)
id_str =
-# if defined(CONFIG_MPC852T)
- "PC852T";
-# elif defined(CONFIG_MPC859T)
+# if defined(CONFIG_MPC859T)
"PC859T";
-# elif defined(CONFIG_MPC859DSL)
- "PC859DSL";
-# elif defined(CONFIG_MPC866T)
- "PC866T";
# else
"PC866x"; /* Unknown chip from MPC866 family */
# endif
diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c
index ccb460e..d12b3df 100644
--- a/arch/powerpc/cpu/mpc8xx/fec.c
+++ b/arch/powerpc/cpu/mpc8xx/fec.c
@@ -542,32 +542,6 @@
(volatile fec_t *) (CONFIG_SYS_IMMR + efis->fecp_offset);
int i;
- if (efis->ether_index == 0) {
-#if defined(CONFIG_FADS) /* FADS family uses FPGA (BCSR) to control PHYs */
-#if defined(CONFIG_MPC885ADS)
- *(vu_char *) BCSR5 &= ~(BCSR5_MII1_EN | BCSR5_MII1_RST);
-#else
- /* configure FADS for fast (FEC) ethernet, half-duplex */
- /* The LXT970 needs about 50ms to recover from reset, so
- * wait for it by discovering the PHY before leaving eth_init().
- */
- {
- volatile uint *bcsr4 = (volatile uint *) BCSR4;
-
- *bcsr4 = (*bcsr4 & ~(BCSR4_FETH_EN | BCSR4_FETHCFG1))
- | (BCSR4_FETHCFG0 | BCSR4_FETHFDE |
- BCSR4_FETHRST);
-
- /* reset the LXT970 PHY */
- *bcsr4 &= ~BCSR4_FETHRST;
- udelay (10);
- *bcsr4 |= BCSR4_FETHRST;
- udelay (10);
- }
-#endif /* CONFIG_MPC885ADS */
-#endif /* CONFIG_FADS */
- }
-
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/* the MII interface is connected to FEC1
* so for the miiphy_xxx function to work we must
diff --git a/arch/powerpc/cpu/mpc8xx/scc.c b/arch/powerpc/cpu/mpc8xx/scc.c
index 7ed98b8..01029ff 100644
--- a/arch/powerpc/cpu/mpc8xx/scc.c
+++ b/arch/powerpc/cpu/mpc8xx/scc.c
@@ -197,19 +197,6 @@
reset_phy();
#endif
-#ifdef CONFIG_FADS
-#if defined(CONFIG_MPC86xADS) || defined(CONFIG_MPC860T)
- /* The MPC86xADS/FADS860T don't use the MODEM_EN or DATA_VOICE signals. */
- *((uint *) BCSR4) &= ~BCSR4_ETHLOOP;
- *((uint *) BCSR4) |= BCSR4_TFPLDL | BCSR4_TPSQEL;
- *((uint *) BCSR1) &= ~BCSR1_ETHEN;
-#else
- *((uint *) BCSR4) &= ~(BCSR4_ETHLOOP | BCSR4_MODEM_EN);
- *((uint *) BCSR4) |= BCSR4_TFPLDL | BCSR4_TPSQEL | BCSR4_DATA_VOICE;
- *((uint *) BCSR1) &= ~BCSR1_ETHEN;
-#endif
-#endif
-
pram_ptr = (scc_enet_t *) & (immr->im_cpm.cp_dparam[PROFF_ENET]);
rxIdx = 0;
@@ -488,13 +475,6 @@
immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl |=
(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- /*
- * Work around transmit problem with first eth packet
- */
-#if defined (CONFIG_FADS)
- udelay (10000); /* wait 10 ms */
-#endif
-
return 1;
}
diff --git a/arch/powerpc/cpu/mpc8xx/serial.c b/arch/powerpc/cpu/mpc8xx/serial.c
index 802d4f1..b1625fb 100644
--- a/arch/powerpc/cpu/mpc8xx/serial.c
+++ b/arch/powerpc/cpu/mpc8xx/serial.c
@@ -173,15 +173,6 @@
# endif
#endif
-#if defined(CONFIG_FADS)
- /* Enable RS232 */
-#if defined(CONFIG_8xx_CONS_SMC1)
- *((uint *) BCSR1) &= ~BCSR1_RS232EN_1;
-#else
- *((uint *) BCSR1) &= ~BCSR1_RS232EN_2;
-#endif
-#endif /* CONFIG_FADS */
-
/* Set the physical address of the host memory buffers in
* the buffer descriptors.
*/
diff --git a/arch/powerpc/cpu/mpc8xx/video.c b/arch/powerpc/cpu/mpc8xx/video.c
index fc35158..2fd5b11 100644
--- a/arch/powerpc/cpu/mpc8xx/video.c
+++ b/arch/powerpc/cpu/mpc8xx/video.c
@@ -798,22 +798,6 @@
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
-#ifdef CONFIG_FADS
- /* Reset ADV7176 chip */
- debug ("[VIDEO ENCODER] Resetting encoder...\n");
- (*(int *) BCSR4) &= ~(1 << 21);
-
- /* Wait for 5 ms inside the reset */
- debug ("[VIDEO ENCODER] Waiting for encoder reset...\n");
- udelay (5000);
-
- /* Take ADV7176 out of reset */
- (*(int *) BCSR4) |= 1 << 21;
-
- /* Wait for 5 ms after the reset */
- udelay (5000);
-#endif /* CONFIG_FADS */
-
/* Send configuration */
#ifdef DEBUG
{
@@ -860,16 +844,6 @@
debug ("[VIDEO CTRL] Turning off video controller...\n");
SETBIT (immap->im_vid.vid_vccr, VIDEO_VCCR_VON, 0);
-#ifdef CONFIG_FADS
- /* Turn on Video Port LED */
- debug ("[VIDEO CTRL] Turning off video port led...\n");
- SETBIT (*(int *) BCSR4, VIDEO_BCSR4_VIDLED_BIT, 1);
-
- /* Disable internal clock */
- debug ("[VIDEO CTRL] Disabling internal clock...\n");
- SETBIT (*(int *) BCSR4, VIDEO_BCSR4_EXTCLK_BIT, 0);
-#endif
-
/* Generate and make active a new video mode */
debug ("[VIDEO CTRL] Generating video mode...\n");
video_mode_generate ();
@@ -892,15 +866,6 @@
immap->im_ioport.iop_pdpar = 0x1fff;
immap->im_ioport.iop_pddir = 0x0000;
-#ifdef CONFIG_FADS
- /* Turn on Video Port Clock - ONLY AFTER SET VCCR TO ENABLE EXTERNAL CLOCK */
- debug ("[VIDEO CTRL] Turning on video clock...\n");
- SETBIT (*(int *) BCSR4, VIDEO_BCSR4_EXTCLK_BIT, 1);
-
- /* Turn on Video Port LED */
- debug ("[VIDEO CTRL] Turning on video port led...\n");
- SETBIT (*(int *) BCSR4, VIDEO_BCSR4_VIDLED_BIT, 0);
-#endif
#ifdef CONFIG_RRVISION
debug ("PC5->Output(1): enable PAL clock");
immap->im_ioport.iop_pcpar &= ~(0x0400);
@@ -1153,9 +1118,7 @@
{
u16 *screen = video_fb_address, width = VIDEO_COLS;
#ifdef VIDEO_INFO
-# ifndef CONFIG_FADS
char temp[32];
-# endif
char info[80];
#endif /* VIDEO_INFO */
@@ -1173,7 +1136,7 @@
sprintf (info, " Wolfgang DENK, wd@denx.de");
video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT * 2,
info);
-#ifndef CONFIG_FADS /* all normal boards */
+
/* leave one blank line */
sprintf(info, "MPC823 CPU at %s MHz, %ld MiB RAM, %ld MiB Flash",
@@ -1182,15 +1145,6 @@
gd->bd->bi_flashsize >> 20 );
video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT * 4,
info);
-#else /* FADS :-( */
- sprintf (info, "MPC823 CPU at 50 MHz on FADS823 board");
- video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT,
- info);
-
- sprintf(info, "2MiB FLASH - 8MiB DRAM - 4MiB SRAM");
- video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT * 2,
- info);
-#endif
#endif
return video_fb_address + VIDEO_LOGO_HEIGHT * VIDEO_LINE_LEN;