| commit | 8c57b0426a92b6616ed59845fe9cd6eb81d413fc | [log] [tgz] |
|---|---|---|
| author | Paul Burton <paul.burton@imgtec.com> | Wed Sep 21 11:18:49 2016 +0100 |
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | Wed Sep 21 15:04:04 2016 +0200 |
| tree | 82545fc3c03572f244679cdfcd4c7387d0a24c41 | |
| parent | dc2037ebf7dbe8db9306dc45100d045c20ef9107 [diff] |
MIPS: Enable use of the instruction cache earlier Enable use of the instruction cache immediately after it has been initialised. This will only take effect if U-Boot was linked to run from kseg0 rather than kseg1, but when this is the case the data cache initialisation code will run cached & thus significantly faster. Signed-off-by: Paul Burton <paul.burton@imgtec.com>