xtensa: Bring in semihosting headers and config options
They are all directly imported from Linux kernel.
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 8f668cc..4afd56b 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -41,6 +41,33 @@
help
Do not enable data cache in SPL.
+config XTENSA_SEMIHOSTING
+ bool "Support semihosting"
+ help
+ Enable Xtensa semihosting debugging support.
+
+choice
+ prompt "Semihosting interface"
+ default XTENSA_SIMCALL_ISS
+ depends on XTENSA_SEMIHOSTING
+ help
+ Choose semihosting interface that will be used for serial port,
+ block device and networking.
+
+config XTENSA_SIMCALL_ISS
+ bool "simcall"
+ help
+ Use simcall instruction. simcall is only available on simulators,
+ it does nothing on hardware.
+
+config XTENSA_SIMCALL_GDBIO
+ bool "GDBIO"
+ help
+ Use break instruction. It is available on real hardware when GDB
+ is attached to it via JTAG.
+
+endchoice
+
source "board/cadence/xtfpga/Kconfig"
endmenu