commit 8bffd71eba3b15c2609c63e605505728217a8328
author Vladimir Zapolskiy <vz@mleia.com> Mon Jul 06 07:22:11 2015 +0300
committer Joe Hershberger <joe.hershberger@ni.com> Tue Aug 11 13:43:04 2015 -0500
tree 9090fa848633e940a5de22ea836c602f74f83694
parent e7d729f4d1a5fa5c3110b107bacfff43aff9955f

net: lpc32xx: add RMII phy mode support

LPC32xx MAC and clock control configuration requires some minor quirks
to deal with a phy connected by RMII.

It's worth to mention that the kernel and legacy BSP from NXP sets
SUPP_RESET_RMII == (1 << 11) bit, however the description of this bit is
missing in shared LPC32x0 User Manual UM10326 Rev. 3, July 22, 2011
and in LPC32x0 Draft User Mannual Rev. 00.27, November 20, 2008, also
in my tests an SMSC LAN8700 phy device connected over RMII seems to
work correctly without touching this bit.

Add support of RMII, if CONFIG_RMII is defined, this option is aligned
with a number of boards, which already define the same config value.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>

drivers/net/lpc32xx_eth.c

diff --git a/drivers/net/lpc32xx_eth.c b/drivers/net/lpc32xx_eth.c
index f883a25..f3ab0f4 100644
--- a/drivers/net/lpc32xx_eth.c
+++ b/drivers/net/lpc32xx_eth.c
@@ -168,6 +168,7 @@
 #define COMMAND_RXENABLE      0x00000001
 #define COMMAND_TXENABLE      0x00000002
 #define COMMAND_PASSRUNTFRAME 0x00000040
+#define COMMAND_RMII          0x00000200
 #define COMMAND_FULL_DUPLEX   0x00000400
 /* Helper: general reset */
 #define COMMAND_RESETS        0x00000038
@@ -201,6 +202,7 @@
 	struct eth_device dev;
 	struct lpc32xx_eth_registers *regs;
 	struct lpc32xx_eth_buffers *bufs;
+	bool phy_rmii;
 };
 
 #define LPC32XX_ETH_DEVICE_SIZE (sizeof(struct lpc32xx_eth_device))
@@ -359,7 +361,10 @@
 
 static struct lpc32xx_eth_device lpc32xx_eth = {
 	.regs = (struct lpc32xx_eth_registers *)LPC32XX_ETH_BASE,
-	.bufs = (struct lpc32xx_eth_buffers *)LPC32XX_ETH_BUFS
+	.bufs = (struct lpc32xx_eth_buffers *)LPC32XX_ETH_BUFS,
+#if defined(CONFIG_RMII)
+	.phy_rmii = true,
+#endif
 };
 
 #define TX_TIMEOUT 10000
@@ -471,7 +476,10 @@
 	writel(0x0012, &regs->ipgr);
 
 	/* pass runt (smaller than 64 bytes) frames */
-	writel(COMMAND_PASSRUNTFRAME, &regs->command);
+	if (lpc32xx_eth_device->phy_rmii)
+		writel(COMMAND_PASSRUNTFRAME | COMMAND_RMII, &regs->command);
+	else
+		writel(COMMAND_PASSRUNTFRAME, &regs->command);
 
 	/* Configure Full/Half Duplex mode */
 	if (miiphy_duplex(dev->name, CONFIG_PHY_ADDR) == FULL) {
@@ -559,6 +567,8 @@
 #if defined(CONFIG_PHYLIB)
 int lpc32xx_eth_phylib_init(struct eth_device *dev, int phyid)
 {
+	struct lpc32xx_eth_device *lpc32xx_eth_device =
+		container_of(dev, struct lpc32xx_eth_device, dev);
 	struct mii_dev *bus;
 	struct phy_device *phydev;
 	int ret;
@@ -579,7 +589,11 @@
 		return -ENOMEM;
 	}
 
+	if (lpc32xx_eth_device->phy_rmii)
+		phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_RMII);
+	else
+		phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_MII);
+
-	phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_MII);
 	if (!phydev) {
 		printf("phy_connect failed\n");
 		return -ENODEV;