commit 8a9561c69a32705332b48b9309e6b7e81eec15fd
author Sonic Zhang <sonic.zhang@analog.com> Tue Feb 05 18:57:49 2013 +0800
committer Sonic Zhang <sonic.zhang@analog.com> Mon May 13 15:47:24 2013 +0800
tree c9a576f2f81d7ad65d8222f20f5c4a1fc4fa0e24
parent 1538ded77d0ba84e2e38252ddbb6c28bc9e28cc0

blackfin: run core1 from L1 code sram start address in uboot init code on core 0

Define core 1 L1 code sram start address.
Add function to enable core 1 for BF609 and BF561.
Add config macro to allow customer to run core 1 in uboot init code on core 0.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>

arch/blackfin/include/asm/mach-bf561/BF561_def.h

diff --git a/arch/blackfin/include/asm/mach-bf561/BF561_def.h b/arch/blackfin/include/asm/mach-bf561/BF561_def.h
index a7ff5a3..8fd552f 100644
--- a/arch/blackfin/include/asm/mach-bf561/BF561_def.h
+++ b/arch/blackfin/include/asm/mach-bf561/BF561_def.h
@@ -714,4 +714,6 @@
 #define L1_INST_SRAM_SIZE (0xFFA03FFF - 0xFFA00000 + 1)
 #define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
 
+#define COREB_L1_CODE_START       0xFF600000
+
 #endif /* __BFIN_DEF_ADSP_BF561_proc__ */