board: sl28: add config to enable console output on SER0
Sometimes it is desireable to have the console output on the first
serial line. Introduce a configuration option for it (in the board
scope).
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
index 240178a..b3861ed 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
@@ -133,6 +133,14 @@
};
};
+#ifdef CONFIG_SL28_ENABLE_SER0_CONSOLE
+/ {
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+};
+#endif
+
#ifdef CONFIG_SL28_SPL_LOADS_ATF_BL31
&binman {
fit {
@@ -250,6 +258,10 @@
u-boot,dm-pre-reloc;
};
+&lpuart1 {
+ u-boot,dm-pre-reloc;
+};
+
&serial0 {
u-boot,dm-pre-reloc;
};
diff --git a/board/kontron/sl28/Kconfig b/board/kontron/sl28/Kconfig
index 4078ef1..abcacc3 100644
--- a/board/kontron/sl28/Kconfig
+++ b/board/kontron/sl28/Kconfig
@@ -48,4 +48,14 @@
endif
+config SL28_ENABLE_SER0_CONSOLE
+ bool "Enable console output on SER0"
+ select DM_SERIAL
+ select SPL_DM_SERIAL
+ select FSL_LPUART
+ help
+ By default the console output of this board is on the second serial
+ line (SER1). Sometimes it is desirable to enable output on the first
+ serial line (SER0). For example, if you have a carrier which only
+ supports the first serial port.
endif
diff --git a/board/kontron/sl28/Makefile b/board/kontron/sl28/Makefile
index 147ef98..5d220f0 100644
--- a/board/kontron/sl28/Makefile
+++ b/board/kontron/sl28/Makefile
@@ -4,7 +4,7 @@
obj-y += sl28.o cmds.o
endif
-obj-y += ddr.o
+obj-y += common.o ddr.o
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
diff --git a/board/kontron/sl28/common.c b/board/kontron/sl28/common.c
new file mode 100644
index 0000000..33c6843
--- /dev/null
+++ b/board/kontron/sl28/common.c
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 get_lpuart_clk(void)
+{
+ return gd->bus_clk / CONFIG_SYS_FSL_LPUART_CLK_DIV;
+}