commit 8948a4f1af689fbe6655e72ba531a449a358353c
author Dinh Nguyen <dinguyen@opensource.altera.com> Tue Aug 04 22:12:32 2015 -0500
committer Marek Vasut <marex@denx.de> Sat Aug 08 14:14:30 2015 +0200
tree 6df4944fb09067c1ee338ffecfd33b4d1dce8289
parent c85b9b3ceba3b7c70326b54580889fbc9d09fc23

ddr: altera: sequencer: add RW_MGR_MEM_NUMBER_OF_RANKS

Fix build error for socfpga_cyclone5_defconfig:

board/altera/socfpga/wrap_sdram_config.c:245:26: error: ‘RW_MGR_MEM_NUMBER_OF_RANKS’ undeclared here (not in a function)
make[2]: *** [spl/board/altera/socfpga/wrap_sdram_config.o] Error 1

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

board/altera/socfpga/qts/sequencer_defines.h

diff --git a/board/altera/socfpga/qts/sequencer_defines.h b/board/altera/socfpga/qts/sequencer_defines.h
index 32f13ac..bfe5b27 100644
--- a/board/altera/socfpga/qts/sequencer_defines.h
+++ b/board/altera/socfpga/qts/sequencer_defines.h
@@ -103,6 +103,7 @@
 #define RW_MGR_MEM_IF_READ_DQS_WIDTH 5
 #define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 5
 #define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM 1
+#define RW_MGR_MEM_NUMBER_OF_RANKS 1
 #define RW_MGR_MEM_ODT_WIDTH 1
 #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS 1
 #define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS 1