commit 892d777c9324d1f4fa9bc90c29a9d0adda14c278
author Nicolò Veronese <nicveronese@gmail.com> Wed Oct 04 00:14:26 2023 +0200
committer Tom Rini <trini@konsulko.com> Wed Oct 11 13:21:33 2023 -0400
tree 96bd39b7be08994cc1ee7f2f49fd8936498ece16
parent 362e66c99bf4721807bec3c27893cb61b45de586

spi: mtk_spim: prevent global pll clock override

With commit 793e62301180 ("spi: mtk_spim: get spi clk rate only once") a
new system to calculate the SPI clocks has been added.

Unfortunately, the do_div macro overrides the global priv->pll_clk_rate
field. This will cause to have a reduced clock rate on each subsequent
SPI call.

Signed-off-by: Valerio 'ftp21' Mancini <ftp21@ftp21.eu>
Signed-off-by: Nicolò Veronese <nicveronese@gmail.com>

drivers/spi/mtk_spim.c

diff --git a/drivers/spi/mtk_spim.c b/drivers/spi/mtk_spim.c
index 418e586..90f4c3c 100644
--- a/drivers/spi/mtk_spim.c
+++ b/drivers/spi/mtk_spim.c
@@ -409,7 +409,7 @@
 {
 	struct udevice *bus = dev_get_parent(slave->dev);
 	struct mtk_spim_priv *priv = dev_get_priv(bus);
-	u32 sck_l, sck_h, clk_count, reg;
+	u32 pll_clk, sck_l, sck_h, clk_count, reg;
 	ulong us = 1;
 	int ret = 0;
 
@@ -418,11 +418,12 @@
 	else
 		clk_count = op->data.nbytes;
 
+	pll_clk = priv->pll_clk_rate;
 	sck_l = readl(priv->base + SPI_CFG2_REG) >> SPI_CFG2_SCK_LOW_OFFSET;
 	sck_h = readl(priv->base + SPI_CFG2_REG) & SPI_CFG2_SCK_HIGH_MASK;
-	do_div(priv->pll_clk_rate, sck_l + sck_h + 2);
+	do_div(pll_clk, sck_l + sck_h + 2);
 
-	us = CLK_TO_US(priv->pll_clk_rate, clk_count * 8);
+	us = CLK_TO_US(pll_clk, clk_count * 8);
 	us += 1000 * 1000; /* 1s tolerance */
 
 	if (us > UINT_MAX)