tree 931afc9c2b8d3d0ced54f34ff4d4831b8e46c117
parent 999273f3d5798b14f71e1317c1e9ed8dc8da0fee
author Nikhil Badola <nikhil.badola@freescale.com> 1435318161 +0530
committer York Sun <yorksun@freescale.com> 1438628798 -0700

armv8/lsch3/config: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A

Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by
USB XHCI stack for alignment

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>