spl: nand: Set bl_len to page size
Since commit 34793598c83 ("mtd: nand: mxs_nand_spl: Remove the page aligned
access") there are no longer any users of nand_get_mtd. However, it is
still important to know what the page size is so we can allocate a
large-enough buffer. If the image size is not page-aligned, we will go off
the end of the buffer and clobber some memory.
Introduce a new function nand_page_size which returns the page size. For
most drivers it is easy to determine the page size. However, a few need to
be modified since they only keep the page size around temporarily.
It's possible that this patch could cause a regression on some platforms if
the offset is non-aligned and there is invalid address space immediately
before the load address. spl_load_legacy_img does not (except when
compressing) respect bl_len, so only boards with SPL_LOAD_FIT (8 boards) or
SPL_LOAD_IMX_CONTAINER (none in tree) would be affected.
defconfig CONFIG_TEXT_BASE
======================= ================
am335x_evm 0x80800000
am43xx_evm 0x80800000
am43xx_evm_rtconly 0x80800000
am43xx_evm_usbhost_boot 0x80800000
am43xx_hs_evm 0x80800000
dra7xx_evm 0x80800000
gwventana_nand 0x17800000
imx8mn_bsh_smm_s2 0x40200000
All the sitara boards have DDR mapped at 0x80000000. gwventana is an i.MX6Q
which has DDR at 0x10000000. I don't have the IMX8MNRM handy, but on the
i.MX8M DDR starts at 0x40000000. Therefore all of these boards can handle a
little underflow.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
diff --git a/drivers/mtd/nand/raw/am335x_spl_bch.c b/drivers/mtd/nand/raw/am335x_spl_bch.c
index fb9c623..6831af9 100644
--- a/drivers/mtd/nand/raw/am335x_spl_bch.c
+++ b/drivers/mtd/nand/raw/am335x_spl_bch.c
@@ -218,6 +218,11 @@
nand_command(0, 0, 0, NAND_CMD_RESET);
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
/* Unselect after operation */
void nand_deselect(void)
{
diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c
index 8332011..6d94e7a 100644
--- a/drivers/mtd/nand/raw/atmel_nand.c
+++ b/drivers/mtd/nand/raw/atmel_nand.c
@@ -1452,6 +1452,11 @@
nand_chip.select_chip(mtd, 0);
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
void nand_deselect(void)
{
if (nand_chip.select_chip)
diff --git a/drivers/mtd/nand/raw/denali_spl.c b/drivers/mtd/nand/raw/denali_spl.c
index 690279c..165a233 100644
--- a/drivers/mtd/nand/raw/denali_spl.c
+++ b/drivers/mtd/nand/raw/denali_spl.c
@@ -234,4 +234,9 @@
return 0;
}
+unsigned int nand_page_size(void)
+{
+ return page_size;
+}
+
void nand_deselect(void) {}
diff --git a/drivers/mtd/nand/raw/fsl_ifc_spl.c b/drivers/mtd/nand/raw/fsl_ifc_spl.c
index c67065e..69d26f1 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_spl.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_spl.c
@@ -106,6 +106,8 @@
return __raw_readw((u16 *)marker) != 0xffff;
}
+static int saved_page_size;
+
int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
{
struct fsl_ifc_fcm *gregs = (void *)CFG_SYS_IFC_ADDR;
@@ -150,6 +152,7 @@
if (port_size == 8)
bad_marker = 5;
}
+ saved_page_size = page_size;
ver = ifc_in32(&gregs->ifc_rev);
if (ver >= FSL_IFC_V2_0_0)
@@ -300,6 +303,11 @@
#ifndef CONFIG_TPL_NAND_INIT
void nand_init(void)
{
+}
+
+unsigned int nand_page_size(void)
+{
+ return saved_page_size;
}
void nand_deselect(void)
diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
index ac2e669..f8ae216 100644
--- a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
@@ -765,4 +765,9 @@
return 0;
}
+unsigned int nand_page_size(void)
+{
+ return BYTES_PER_PAGE;
+}
+
#endif /* CONFIG_SPL_BUILD */
diff --git a/drivers/mtd/nand/raw/mt7621_nand_spl.c b/drivers/mtd/nand/raw/mt7621_nand_spl.c
index 114fc8b..a2be9ba 100644
--- a/drivers/mtd/nand/raw/mt7621_nand_spl.c
+++ b/drivers/mtd/nand/raw/mt7621_nand_spl.c
@@ -203,6 +203,11 @@
return SZ_2G;
}
+unsigned int nand_page_size(void)
+{
+ return nfc_dev.nand.mtd.writesize;
+}
+
void nand_deselect(void)
{
}
diff --git a/drivers/mtd/nand/raw/mxc_nand_spl.c b/drivers/mtd/nand/raw/mxc_nand_spl.c
index 81ceb12..a855c99 100644
--- a/drivers/mtd/nand/raw/mxc_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxc_nand_spl.c
@@ -351,3 +351,8 @@
void nand_init(void) {}
void nand_deselect(void) {}
+
+unsigned int nand_page_size(void)
+{
+ return CONFIG_SYS_NAND_PAGE_SIZE;
+}
diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
index 3006629..f7d3f02 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -295,6 +295,11 @@
return 0;
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
void nand_deselect(void)
{
}
diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
index eacd99c..4da4143 100644
--- a/drivers/mtd/nand/raw/nand.c
+++ b/drivers/mtd/nand/raw/nand.c
@@ -174,3 +174,10 @@
create_mtd_concat();
}
+
+unsigned int nand_page_size(void)
+{
+ struct mtd_info *mtd = get_nand_dev_by_index(nand_curr_device);
+
+ return mtd ? mtd->writesize : 1;
+}
diff --git a/drivers/mtd/nand/raw/nand_spl_simple.c b/drivers/mtd/nand/raw/nand_spl_simple.c
index bbdb76d..80d6e0e 100644
--- a/drivers/mtd/nand/raw/nand_spl_simple.c
+++ b/drivers/mtd/nand/raw/nand_spl_simple.c
@@ -227,6 +227,11 @@
nand_chip.select_chip(mtd, 0);
}
+unsigned int nand_page_size(void)
+{
+ return nand_to_mtd(&nand_chip)->writesize;
+}
+
/* Unselect after operation */
void nand_deselect(void)
{
diff --git a/drivers/mtd/nand/raw/sunxi_nand_spl.c b/drivers/mtd/nand/raw/sunxi_nand_spl.c
index 6de0b0a..c9b8c78 100644
--- a/drivers/mtd/nand/raw/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/raw/sunxi_nand_spl.c
@@ -524,9 +524,10 @@
return 0;
}
+static struct nfc_config conf;
+
int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest)
{
- static struct nfc_config conf = { };
int ret;
ret = nand_detect_config(&conf, offs, dest);
@@ -536,6 +537,11 @@
return nand_read_buffer(&conf, offs, size, dest);
}
+unsigned int nand_page_size(void)
+{
+ return conf.page_size;
+}
+
void nand_deselect(void)
{
struct sunxi_ccm_reg *const ccm =