| commit | 08ceb1e6f785ba893433bace682ec7bbb5632d0e | [log] [tgz] |
|---|---|---|
| author | Jimmy Zhang <jimmzhang@nvidia.com> | Mon Sep 23 22:07:49 2013 +0200 |
| committer | Tom Warren <twarren@nvidia.com> | Wed Dec 18 10:19:48 2013 -0700 |
| tree | 4e8f3d994677a356141774cf292cce01a993c304 | |
| parent | c9e70e200e5de5f17789f6e08cb0ee0d356098ba [diff] |
Tegra114: Fix PLLX M, N, P init settings The M, N and P width have been changed from Tegra30. The maximum value for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should be set accordingly. Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Reviewed-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>