pci: pcie_dw_rockchip: Get config region from reg prop
Get the config region to use from the reg prop. Also update the
referenced region index used in comment.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/drivers/pci/pcie_dw_common.c b/drivers/pci/pcie_dw_common.c
index 9f8b016..74fb6df 100644
--- a/drivers/pci/pcie_dw_common.c
+++ b/drivers/pci/pcie_dw_common.c
@@ -141,9 +141,9 @@
/*
* Not accessing root port configuration space?
- * Region #0 is used for Outbound CFG space access.
+ * Region #1 is used for Outbound CFG space access.
* Direction = Outbound
- * Region Index = 0
+ * Region Index = 1
*/
d = PCI_MASK_BUS(d);
d = PCI_ADD_BUS(bus, d);
@@ -328,8 +328,10 @@
pci->prefetch.bus_start = hose->regions[ret].bus_start; /* PREFETCH_bus_addr */
pci->prefetch.size = hose->regions[ret].size; /* PREFETCH size */
} else if (hose->regions[ret].flags == PCI_REGION_SYS_MEMORY) {
- pci->cfg_base = (void *)(pci->io.phys_start - pci->io.size);
- pci->cfg_size = pci->io.size;
+ if (!pci->cfg_base) {
+ pci->cfg_base = (void *)(pci->io.phys_start - pci->io.size);
+ pci->cfg_size = pci->io.size;
+ }
} else {
dev_err(pci->dev, "invalid flags type!\n");
}
diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 6da6180..83737e6 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -366,6 +366,13 @@
dev_dbg(dev, "APB address is 0x%p\n", priv->apb_base);
+ priv->dw.cfg_base = dev_read_addr_size_index_ptr(dev, 2,
+ &priv->dw.cfg_size);
+ if (!priv->dw.cfg_base)
+ return -EINVAL;
+
+ dev_dbg(dev, "CFG address is 0x%p\n", priv->dw.cfg_base);
+
ret = gpio_request_by_name(dev, "reset-gpios", 0,
&priv->rst_gpio, GPIOD_IS_OUT);
if (ret) {