85xx: Set HID1[mbdd] on e500v2 rev5.0 or greater
The HID1[MBDD] bit is new on rev5.0 or greater cores and will optimize
the performance of mbar/eieio instructions.
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 52ea9b3..b3cb56a 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -208,6 +208,13 @@
#ifndef CONFIG_E500MC
li r0,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
+ mfspr r3,PVR
+ andi. r3,r3, 0xff
+ cmpwi r3,0x50@l /* if we are rev 5.0 or greater set MBDD */
+ blt 1f
+ /* Set MBDD bit also */
+ ori r0, r0, HID1_MBDD@l
+1:
mtspr HID1,r0
#endif