commit 85ed77d96c0610f73800890b51ea4f35c7d0a8df
author Simon Glass <sjg@chromium.org> Sun Sep 29 19:49:46 2024 -0600
committer Tom Rini <trini@konsulko.com> Fri Oct 11 11:44:47 2024 -0600
tree 2f2d2438160813a1dd77792d01a23581011c7e69
parent 71a9d1a387bf50e55426cdd86a6749d52101bb7a

arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>

arch/riscv/cpu/fu540/Makefile

diff --git a/arch/riscv/cpu/fu540/Makefile b/arch/riscv/cpu/fu540/Makefile
index 043fb96..69759c5 100644
--- a/arch/riscv/cpu/fu540/Makefile
+++ b/arch/riscv/cpu/fu540/Makefile
@@ -3,7 +3,7 @@
 # Copyright (C) 2020 SiFive, Inc
 # Pragnesh Patel <pragnesh.patel@sifive.com>
 
-ifeq ($(CONFIG_SPL_BUILD),y)
+ifeq ($(CONFIG_XPL_BUILD),y)
 obj-y += spl.o
 else
 obj-y += dram.o

arch/riscv/cpu/fu740/Makefile

diff --git a/arch/riscv/cpu/fu740/Makefile b/arch/riscv/cpu/fu740/Makefile
index 1d1ad98..9071c83 100644
--- a/arch/riscv/cpu/fu740/Makefile
+++ b/arch/riscv/cpu/fu740/Makefile
@@ -3,7 +3,7 @@
 # Copyright (C) 2020-2021 SiFive, Inc
 # Pragnesh Patel <pragnesh.patel@sifive.com>
 
-ifeq ($(CONFIG_SPL_BUILD),y)
+ifeq ($(CONFIG_XPL_BUILD),y)
 obj-y += spl.o
 else
 obj-y += dram.o

arch/riscv/cpu/jh7110/Makefile

diff --git a/arch/riscv/cpu/jh7110/Makefile b/arch/riscv/cpu/jh7110/Makefile
index 951c956..0939c10 100644
--- a/arch/riscv/cpu/jh7110/Makefile
+++ b/arch/riscv/cpu/jh7110/Makefile
@@ -2,7 +2,7 @@
 #
 # Copyright (C) 2022 StarFive Technology Co., Ltd.
 
-ifeq ($(CONFIG_SPL_BUILD),y)
+ifeq ($(CONFIG_XPL_BUILD),y)
 obj-y += spl.o
 else
 obj-y += cpu.o

arch/riscv/cpu/start.S

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 8e58f64..3f78932 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -90,7 +90,7 @@
  * Set stackpointer in internal/ex RAM to call board_init_f
  */
 call_board_init_f:
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_STACK)
 	li	t0, CONFIG_SPL_STACK
 #else
 	li	t0, SYS_INIT_SP_ADDR
@@ -218,7 +218,7 @@
 	la	t5, board_init_f
 	jalr	t5			/* jump to board_init_f() */
 
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_XPL_BUILD
 spl_clear_bss:
 	la	t0, __bss_start
 	la	t1, __bss_end
@@ -271,7 +271,7 @@
 	j	board_init_r
 #endif
 
-#if !defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_XPL_BUILD)
 /*
  * void relocate_code(addr_sp, gd, addr_moni)
  *
@@ -420,7 +420,7 @@
  * jump to it ...
  */
 	jr	t4			/* jump to board_init_r() */
-#endif /* !defined(CONFIG_SPL_BUILD) */
+#endif /* !defined(CONFIG_XPL_BUILD) */
 
 #if CONFIG_IS_ENABLED(SMP)
 hart_out_of_bounds_loop:

arch/riscv/lib/Makefile

diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 65dc49f..3bc34cd 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -24,7 +24,7 @@
 endif
 obj-y   += setjmp.o
 obj-$(CONFIG_$(SPL_)SMP) += smp.o
-obj-$(CONFIG_SPL_BUILD)	+= spl.o
+obj-$(CONFIG_XPL_BUILD)	+= spl.o
 obj-y   += fdt_fixup.o
 obj-$(CONFIG_$(SPL)CMD_BDI) += bdinfo.o
 

arch/riscv/lib/sifive_cache.c

diff --git a/arch/riscv/lib/sifive_cache.c b/arch/riscv/lib/sifive_cache.c
index d8fe1df..d74544b 100644
--- a/arch/riscv/lib/sifive_cache.c
+++ b/arch/riscv/lib/sifive_cache.c
@@ -10,7 +10,7 @@
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
 
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_XPL_BUILD
 void enable_caches(void)
 {
 	struct udevice *dev;
@@ -45,4 +45,4 @@
 
 	probe_cache_device(DM_DRIVER_GET(sifive_pl2), dev);
 }
-#endif /* !CONFIG_SPL_BUILD */
+#endif /* !CONFIG_XPL_BUILD */