commit 85ed77d96c0610f73800890b51ea4f35c7d0a8df
author Simon Glass <sjg@chromium.org> Sun Sep 29 19:49:46 2024 -0600
committer Tom Rini <trini@konsulko.com> Fri Oct 11 11:44:47 2024 -0600
tree 2f2d2438160813a1dd77792d01a23581011c7e69
parent 71a9d1a387bf50e55426cdd86a6749d52101bb7a

arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>

arch/arm/mach-mvebu/include/mach/cpu.h

diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index af6ce29..37a0050 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -66,7 +66,7 @@
 /*
  * Default Device Address MAP BAR values
  */
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_XPL_BUILD
 #ifdef CONFIG_ARMADA_38X
 #define MBUS_PCI_MEM_BASE	0x88000000
 #define MBUS_PCI_MEM_SIZE	((3 * 128) << 20)
@@ -81,19 +81,19 @@
 #define MBUS_PCI_IO_BASE	0xF1100000
 #define MBUS_PCI_IO_SIZE	((MBUS_PCI_MAX_PORTS * 64) << 10)
 #endif
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_XPL_BUILD
 #define MBUS_SPI_BASE		0xD4000000
 #define MBUS_SPI_SIZE		(64 << 20)
 #else
 #define MBUS_SPI_BASE		0xF4000000
 #define MBUS_SPI_SIZE		(8 << 20)
 #endif
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_XPL_BUILD
 #define MBUS_DFX_BASE		0xF6000000
 #define MBUS_DFX_SIZE		(1 << 20)
 #endif
 #define MBUS_BOOTROM_BASE	0xF8000000
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_XPL_BUILD
 #define MBUS_BOOTROM_SIZE	(128 << 20)
 #else
 #define MBUS_BOOTROM_SIZE	(8 << 20)