phy: marvell: fix pll initialization for second utmi port
According to Design Reference Specification the PHY PLL and Calibration
register from PHY0 are shared for multi-port PHY. PLL control registers
inside other PHY channels are not used.
This commit reworks utmi device tree nodes in a way that common PHY PLL
registers are moved to main utmi node. Accordingly both child nodes
utmi-unit range is reduced and register offsets in utmi_phy.h are updated
to this change.
This fixes issues in scenarios when only utmi port1 was in use, which
resulted with lack of correct pll initialization.
Change-Id: Icc520dfa719f43a09493ab31f671efbe88872097
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
diff --git a/arch/arm/dts/armada-cp110.dtsi b/arch/arm/dts/armada-cp110.dtsi
index 8241c64..abf1e4e 100644
--- a/arch/arm/dts/armada-cp110.dtsi
+++ b/arch/arm/dts/armada-cp110.dtsi
@@ -192,22 +192,28 @@
max-lanes = <6>;
};
- CP110_LABEL(utmi0): utmi@580000 {
- compatible = "marvell,mvebu-utmi-2.6.0";
- reg = <0x580000 0x1000>, /* utmi-unit */
- <0x440420 0x4>, /* usb-cfg */
- <0x440440 0x4>; /* utmi-cfg */
- utmi-port = <UTMI_PHY_TO_USB3_HOST0>;
- status = "disabled";
- };
+ CP110_LABEL(utmi): utmi@580000 {
+ compatible = "marvell,mvebu-utmi";
+ reg = <0x580000 0xc>; /* utmi-common-pll */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ CP110_LABEL(utmi0): utmi@58000c {
+ compatible = "marvell,mvebu-utmi-2.6.0";
+ reg = <0x58000c 0x100>,/* utmi-unit */
+ <0x440420 0x4>, /* usb-cfg */
+ <0x440440 0x4>; /* utmi-cfg */
+ utmi-port = <UTMI_PHY_TO_USB3_HOST0>;
+ status = "disabled";
+ };
- CP110_LABEL(utmi1): utmi@581000 {
- compatible = "marvell,mvebu-utmi-2.6.0";
- reg = <0x581000 0x1000>, /* utmi-unit */
- <0x440420 0x4>, /* usb-cfg */
- <0x440444 0x4>; /* utmi-cfg */
- utmi-port = <UTMI_PHY_TO_USB3_HOST1>;
- status = "disabled";
+ CP110_LABEL(utmi1): utmi@58100c {
+ compatible = "marvell,mvebu-utmi-2.6.0";
+ reg = <0x58100c 0x100>,/* utmi-unit */
+ <0x440420 0x4>, /* usb-cfg */
+ <0x440444 0x4>; /* utmi-cfg */
+ utmi-port = <UTMI_PHY_TO_USB3_HOST1>;
+ status = "disabled";
+ };
};
CP110_LABEL(sdhci0): sdhci@780000 {