x86: Add various minor tidy-ups in mrccache codes
Fix some nits, improve some comments and reorder some codes
a little bit.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/include/asm/mrccache.h b/arch/x86/include/asm/mrccache.h
index ff41b8a..2fd9082 100644
--- a/arch/x86/include/asm/mrccache.h
+++ b/arch/x86/include/asm/mrccache.h
@@ -1,17 +1,17 @@
/*
- * Copyright (c) 2014 Google, Inc
+ * Copyright (C) 2014 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef _ASM_ARCH_MRCCACHE_H
-#define _ASM_ARCH_MRCCACHE_H
+#ifndef _ASM_MRCCACHE_H
+#define _ASM_MRCCACHE_H
#define MRC_DATA_ALIGN 0x1000
-#define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | ('C' << 16) | \
- ('D'<<24))
+#define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | \
+ ('C' << 16) | ('D'<<24))
-__packed struct mrc_data_container {
+struct __packed mrc_data_container {
u32 signature; /* "MRCD" */
u32 data_size; /* Size of the 'data' field */
u32 checksum; /* IP style checksum */
@@ -28,7 +28,7 @@
* This searches the MRC cache region looking for the latest record to use
* for setting up SDRAM
*
- * @entry: Information about the position and size of the MRC cache
+ * @entry: Position and size of MRC cache in SPI flash
* @return pointer to latest record, or NULL if none
*/
struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry);
@@ -36,8 +36,8 @@
/**
* mrccache_update() - update the MRC cache with a new record
*
- * This writes a new record to the end of the MRC cache. If the new record is
- * the same as the latest record then the write is skipped
+ * This writes a new record to the end of the MRC cache region. If the new
+ * record is the same as the latest record then the write is skipped
*
* @sf: SPI flash to write to
* @entry: Position and size of MRC cache in SPI flash
@@ -48,4 +48,4 @@
int mrccache_update(struct udevice *sf, struct fmap_entry *entry,
struct mrc_data_container *cur);
-#endif
+#endif /* _ASM_MRCCACHE_H */