Add cache functions to SPL for armv7
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <tom.rini@gmail.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Simon Schwarz <simonschwarzcor@gmail.com>
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index f97fa3d..6b2addc 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -27,9 +27,7 @@
START := start.o
-ifndef CONFIG_SPL_BUILD
COBJS += cache_v7.o
-endif
COBJS += cpu.o
COBJS += syslib.o
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 662c496..c6fa8ef 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -52,7 +52,9 @@
*
* we turn off caches etc ...
*/
+#ifndef CONFIG_SPL_BUILD
disable_interrupts();
+#endif
/*
* Turn off I-cache and invalidate it
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 300c8fa..39a9550 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -39,8 +39,6 @@
COBJS-y += board.o
COBJS-y += bootm.o
-COBJS-y += cache.o
-COBJS-y += cache-cp15.o
COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
COBJS-y += interrupts.o
COBJS-y += reset.o
@@ -48,6 +46,9 @@
SOBJS-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
endif
+COBJS-y += cache.o
+COBJS-y += cache-cp15.o
+
SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \
$(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))