commit | 84d4f736ab79de853b7e06289dcce6527ef00661 | [log] [tgz] |
---|---|---|
author | Marek Vasut <marex@denx.de> | Tue Sep 14 05:22:31 2021 +0200 |
committer | Jagan Teki <jagan@amarulasolutions.com> | Thu Dec 02 11:10:40 2021 +0530 |
tree | d0ff08f8f2d1621b77432f10beecf33523fb3093 | |
parent | 8620739bae34a0e52a6faa2a2decfe83c3c143e3 [diff] |
mtd: cqspi: Wait for transfer completion Wait for the read/write transfer finish bit get actually cleared, this does not happen immediately on at least SoCFPGA Gen5. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Pratyush Yadav <p.yadav@ti.com>