diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c
index ffe3511..1e16b89 100644
--- a/arch/arm/cpu/arm11/cpu.c
+++ b/arch/arm/cpu/arm11/cpu.c
@@ -20,6 +20,7 @@
 #include <irq_func.h>
 #include <asm/cache.h>
 #include <asm/system.h>
+#include <asm/arm11.h>
 
 static void cache_flush(void);
 
@@ -43,6 +44,11 @@
 	return 0;
 }
 
+void allow_unaligned(void)
+{
+	arm11_arch_cp15_allow_unaligned();
+}
+
 static void cache_flush(void)
 {
 	unsigned long i = 0;
diff --git a/arch/arm/cpu/arm11/sctlr.S b/arch/arm/cpu/arm11/sctlr.S
index 74a7fc4..8722f83 100644
--- a/arch/arm/cpu/arm11/sctlr.S
+++ b/arch/arm/cpu/arm11/sctlr.S
@@ -8,7 +8,7 @@
 #include <linux/linkage.h>
 
 /*
- * void allow_unaligned(void) - allow unaligned access
+ * void arm11_arch_cp15_allow_unaligned(void) - allow unaligned access
  *
  * This routine sets the enable unaligned data support flag and clears the
  * aligned flag in the system control register.
@@ -16,10 +16,10 @@
  * data abort or undefined behavior but is handled by the CPU.
  * For details see the "ARM Architecture Reference Manual" for ARMv6.
  */
-ENTRY(allow_unaligned)
+ENTRY(arm11_arch_cp15_allow_unaligned)
 	mrc	p15, 0, r0, c1, c0, 0	@ load system control register
 	orr	r0, r0, #1 << 22	@ set unaligned data support flag
 	bic	r0, r0, #2		@ clear aligned flag
 	mcr	p15, 0, r0, c1, c0, 0	@ write system control register
 	bx	lr			@ return
-ENDPROC(allow_unaligned)
+ENDPROC(arm11_arch_cp15_allow_unaligned)