tree 56c1bcba748767d7d29b60b5f82d481abf9d6730
parent b9c16b78687ad4a2b92dc853a33b46b8fa7a915c
author Antonio Borneo <antonio.borneo@st.com> 1580202661 +0100
committer Patrick Delaunay <patrick.delaunay@st.com> 1581611182 +0100

ARM: dts: stm32mp1: move FDCAN to PLL4_R

LTDC modifies the clock frequency to adapt it to the display. Such
frequency change is not detected by the FDCAN driver that instead
cache the value at probe and pretend to use it later.

Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R.

Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>