mmc: am654_sdhci: Fix OTAP/ITAP delay values
U-Boot is failing to boot class U1 UHS SD cards due to incorrect
OTAP and ITAP delay select values. Update OTAP and ITAP delay select
values from DT.
Fixes: c7d106b4eb3 ("mmc: am654_sdhci: Update output tap delay writes")
Signed-off-by: Nitin Yadav <n-yadav@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 7e41dd9..becb355 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -513,12 +513,27 @@
{
struct udevice *dev = host->mmc->dev;
struct am654_sdhci_plat *plat = dev_get_plat(dev);
- u32 otap_del_sel, mask, val;
+ int mode = host->mmc->selected_mode;
+ u32 otap_del_sel;
+ u32 itap_del_sel;
+ u32 mask, val;
- otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
+ otap_del_sel = plat->otap_del_sel[mode];
+
mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
- val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);
+ val = (1 << OTAPDLYENA_SHIFT) |
+ (otap_del_sel << OTAPDLYSEL_SHIFT);
+
+ itap_del_sel = plat->itap_del_sel[mode];
+
+ mask |= ITAPDLYENA_MASK | ITAPDLYSEL_MASK;
+ val |= (1 << ITAPDLYENA_SHIFT) |
+ (itap_del_sel << ITAPDLYSEL_SHIFT);
+
+ regmap_update_bits(plat->base, PHY_CTRL4, ITAPCHGWIN_MASK,
+ 1 << ITAPCHGWIN_SHIFT);
regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
+ regmap_update_bits(plat->base, PHY_CTRL4, ITAPCHGWIN_MASK, 0);
regmap_update_bits(plat->base, PHY_CTRL5, CLKBUFSEL_MASK,
plat->clkbuf_sel);
@@ -572,7 +587,7 @@
* Remove the corresponding capability if an otap-del-sel
* value is not found
*/
- for (i = MMC_HS; i <= MMC_HS_400; i++) {
+ for (i = MMC_LEGACY; i <= MMC_HS_400; i++) {
ret = dev_read_u32(dev, td[i].otap_binding,
&plat->otap_del_sel[i]);
if (ret) {