tree 38bb65f86352d2da7a20452e92076908b96f9faf
parent 191dba4496c7077e33da80aac191539b6e0c9f0e
author Fabio Estevam <fabio.estevam@freescale.com> 1365512785 +0000
committer Stefano Babic <sbabic@denx.de> 1365868002 +0200

spi: mxc_spi: Set master mode for all channels

The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi
clock glitch durant reset) solved, is back now and itwas re-introduced by
commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling).

Actually the glitch is happening due to always toggling between slave mode
and master mode by configuring the CHANNEL_MODE bits in this reset function.

Since the spi driver only supports master mode, set the mode for all channels
always to master mode in order to have a stable, "glitch-free" SPI clock line.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>