tree 063eb581720ddb3b2462c314dc28367b86399bf9
parent a87d2f5bd2b13a9e51aef8d12f135c20e6f76125
author Marek Vasut <marex@denx.de> 1606818558 +0100
committer Patrick Delaunay <patrick.delaunay@foss.st.com> 1607507870 +0100

ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock

The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>