omap3: igep0x00: Update for DM SPL support
This change is heavily based on commit e0cc7df9fdf2 ("omap3_beagle: Update
for DM SPL support"), that did the same update for the OMAP3 Beagle board.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
diff --git a/arch/arm/dts/omap3-igep0020-u-boot.dtsi b/arch/arm/dts/omap3-igep0020-u-boot.dtsi
index 41beaf0..2c03701 100644
--- a/arch/arm/dts/omap3-igep0020-u-boot.dtsi
+++ b/arch/arm/dts/omap3-igep0020-u-boot.dtsi
@@ -5,20 +5,10 @@
* (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
*/
+#include "omap3-u-boot.dtsi"
+
/ {
chosen {
stdout-path = &uart3;
};
};
-
-&uart1 {
- reg-shift = <2>;
-};
-
-&uart2 {
- reg-shift = <2>;
-};
-
-&uart3 {
- reg-shift = <2>;
-};
diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 8a3f290..a35a7cd 100644
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -29,18 +29,6 @@
#include <fdt_support.h>
#include "igep00x0.h"
-static const struct ns16550_plat igep_serial = {
- .base = OMAP34XX_UART3,
- .reg_shift = 2,
- .clock = V_NS16550_CLK,
- .fcr = UART_FCR_DEFVAL,
-};
-
-U_BOOT_DRVINFO(igep_uart) = {
- "ns16550_serial",
- &igep_serial
-};
-
/*
* Routine: get_board_revision
* Description: GPIO_28 and GPIO_129 are used to read board and revision from
diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig
index 6df6c33..c1b873a 100644
--- a/configs/igep00x0_defconfig
+++ b/configs/igep00x0_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_TI_COMMON_CMD_OPTIONS=y
@@ -40,16 +42,7 @@
CONFIG_SPL_UBI_INFO_ADDR=0x88080000
CONFIG_SPL_UBI_VOL_IDS=8
CONFIG_SPL_UBI_LOAD_MONITOR_ID=0
-CONFIG_SPL_UBI_LOAD_KERNEL_ID=3
-CONFIG_SPL_UBI_LOAD_ARGS_ID=4
CONFIG_SPL_ONENAND_SUPPORT=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x84000000
-CONFIG_SYS_NAND_SPL_KERNEL_OFFS=0x280000
-CONFIG_SPL_FALCON_BOOT_MMCSD=y
-CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x1700
-CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500
-CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200
CONFIG_CMD_SPL=y
CONFIG_CMD_NAND=y
CONFIG_CMD_ONENAND=y
@@ -59,7 +52,11 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
# CONFIG_CMD_UBIFS is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent"
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_UBI=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
@@ -69,6 +66,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_NET is not set
+CONFIG_SPL_DM=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
@@ -81,5 +79,6 @@
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_CONS_INDEX=3
CONFIG_BCH=y