Minor coding style cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..30624a5 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -34,7 +34,7 @@
 COBJS-$(CONFIG_SPL_BUILD) += foo.o
 
 #ifdef CONFIG_SPL_BUILD
-        foo();
+	foo();
 #endif
 
 
diff --git a/doc/README.at91-soc b/doc/README.at91-soc
index ed6e76a..bed035c 100644
--- a/doc/README.at91-soc
+++ b/doc/README.at91-soc
@@ -39,4 +39,3 @@
 3. add new structures for SoC access
 4. Convert arch, driver and boards file to new SoC
 5. remove legacy code, if all boards and drives are ready
-
diff --git a/doc/README.ublimage b/doc/README.ublimage
index add24d6..ab25b26 100644
--- a/doc/README.ublimage
+++ b/doc/README.ublimage
@@ -101,22 +101,22 @@
 Structure of this binary (Example for the cam_enc_4xx board with a NAND
 page size = 0x800):
 
-offset :    0x00000 | 0x800       | 0x3800
-content:    UBL     | nand_spl    | u-boot code
-            Header  | code        |
+offset :    0x00000 | 0x800	  | 0x3800
+content:    UBL     | nand_spl	  | u-boot code
+	    Header  | code	  |
 
 The NAND layout looks for example like this:
 
 (Example for the cam_enc_4xx board with a NAND page size = 0x800, block
 size = 0x20000 and CONFIG_SYS_NROF_UBL_HEADER 5):
 
-offset :    0x80000 | 0xa0000     | 0xa3000
-content:    UBL     | nand_spl    | u-boot code
-            Header  | code        |
-            ^         ^
-	    ^         0xa0000 = CONFIG_SYS_NROF_UBL_HEADER * 0x20000
-            ^
-            0x80000 = Block 4 * 0x20000
+offset :    0x80000 | 0xa0000	  | 0xa3000
+content:    UBL     | nand_spl	  | u-boot code
+	    Header  | code	  |
+	    ^	      ^
+	    ^	      0xa0000 = CONFIG_SYS_NROF_UBL_HEADER * 0x20000
+	    ^
+	    0x80000 = Block 4 * 0x20000
 
 If the cpu starts in NAND boot mode, it checks the UBL descriptor
 starting with block 1 (page 0).  When a valid UBL signature is found,
@@ -132,7 +132,7 @@
 
 Once the user-specified start-up conditions are set, the RBL copies the
 nand_spl into ARM internal RAM, starting at address 0x0000: 0020.
-                                                            ^^^^
+							    ^^^^
 
 The nand_spl code itself now does necessary intializations, and at least,
 copies the u-boot code from NAND into RAM, and jumps to it ...
diff --git a/doc/README.usb b/doc/README.usb
index a8a4058..0771c71 100644
--- a/doc/README.usb
+++ b/doc/README.usb
@@ -116,7 +116,7 @@
 If you look at drivers/usb/eth/asix.c you will see this line within the
 supported device list, so we know this adapter is supported.
 
-        { 0x0b95, 0x7720 },     /* Trendnet TU2-ET100 V3.0R */
+	{ 0x0b95, 0x7720 },	/* Trendnet TU2-ET100 V3.0R */
 
 If your adapter is not listed there is a still a chance that it will
 work. Try looking up the manufacturer of the chip inside your adapter.
@@ -144,8 +144,8 @@
 support USB with CONFIG_CMD_USB enabled and working. You will need to
 add some config settings to your board header file:
 
-#define CONFIG_USB_HOST_ETHER   /* Enable USB Ethernet adapters */
-#define CONFIG_USB_ETHER_ASIX   /* Asix, or whatever driver(s) you want */
+#define CONFIG_USB_HOST_ETHER	/* Enable USB Ethernet adapters */
+#define CONFIG_USB_ETHER_ASIX	/* Asix, or whatever driver(s) you want */
 
 As with built-in networking, you will also want to enable some network
 commands, for example:
@@ -168,9 +168,9 @@
 as well as the default file to load when a 'bootp' command is issued.
 All of these can be obtained from the bootp server if not set.
 
-#define CONFIG_IPADDR           10.0.0.2  (replace with your value)
-#define CONFIG_SERVERIP         10.0.0.1  (replace with your value)
-#define CONFIG_BOOTFILE         uImage
+#define CONFIG_IPADDR		10.0.0.2  (replace with your value)
+#define CONFIG_SERVERIP		10.0.0.1  (replace with your value)
+#define CONFIG_BOOTFILE		uImage
 
 
 The 'usb start' command should identify the adapter something like this:
@@ -200,9 +200,9 @@
 Filename '/tftpboot/uImage-sjg-seaboard-261347'.
 Load address: 0x40c000
 Loading: #################################################################
-         #################################################################
-         #################################################################
-         ################################################
+	 #################################################################
+	 #################################################################
+	 ################################################
 done
 Bytes transferred = 3557464 (364858 hex)
 CrOS>