tree fc58f6aa543d4f920d1b4b36dc52c534d6dc1afc
parent a27b3fb619f242ea53ac58a2d1209f5624c1d557
parent b7b3637d79c46e07359cf3a89b7902067811a906
author Tom Rini <trini@konsulko.com> 1543883454 -0500
committer Tom Rini <trini@konsulko.com> 1543883454 -0500

Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.01

microblaze:
- Use default functions for memory decoding
- Showing model from DT

zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets

zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting

nand:
- arasan: Add subpage configuration

net:
- gem: Add 64bit DMA support