commit 819b57219337563f4bbc166c072997e159f3a209
author Gregory CLEMENT <gregory.clement@bootlin.com> Fri Dec 14 16:16:48 2018 +0100
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Wed Dec 19 15:23:01 2018 +0100
tree 73a1600debc1d5d272a39d2d3d8dd8ecd882ca69
parent af05ee531bb234a907e57ccd789e597ee080c29c

MSCC: add support for Luton SoCs

As the Ocelots SoCs, this family of SoCs are found in the Microsemi
Switches solution.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

arch/mips/mach-mscc/Makefile

diff --git a/arch/mips/mach-mscc/Makefile b/arch/mips/mach-mscc/Makefile
index d14ec33..6c60f26 100644
--- a/arch/mips/mach-mscc/Makefile
+++ b/arch/mips/mach-mscc/Makefile
@@ -3,3 +3,4 @@
 CFLAGS_cpu.o += -finline-limit=64000
 
 obj-y += cpu.o dram.o reset.o lowlevel_init.o
+obj-$(CONFIG_SOC_LUTON) += lowlevel_init_luton.o