clk: add support for TI K3 SoC PLL
Add support for TI K3 SoC PLLs. This clock type supports
enabling/disabling/setting and querying the clock rate for the PLL. The
euclidean library routine is used to calculate divider/multiplier rates
for the PLLs.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
diff --git a/drivers/clk/ti/Makefile b/drivers/clk/ti/Makefile
index 9f56b47..4783921 100644
--- a/drivers/clk/ti/Makefile
+++ b/drivers/clk/ti/Makefile
@@ -11,3 +11,4 @@
obj-$(CONFIG_CLK_TI_GATE) += clk-gate.o
obj-$(CONFIG_CLK_TI_MUX) += clk-mux.o
obj-$(CONFIG_CLK_TI_SCI) += clk-sci.o
+obj-$(CONFIG_$(SPL_TPL_)CLK_K3_PLL) += clk-k3-pll.o