tree fe44a25865608126801c6b9d5ff3e8073c08e4a9
parent 00a151317dc5d4d0db71c2a7dd4024c29702510f
author Tero Kristo <t-kristo@ti.com> 1569600866 +0300
committer Tom Rini <trini@konsulko.com> 1570815159 -0400

clk: cdce9xx: add support for cdce9xx clock synthesizer

Add support for CDCE913/925/937/949 family of devices. These are modular
PLL-based low cost, high performance, programmable clock synthesizers,
multipliers and dividers. They generate up to 9 output clocks from a
single input frequency. The initial version of the driver does not
support programming of the PLLs, and thus they run in the bypass mode
only. The code is loosely based on the linux kernel cdce9xx driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>