| commit | 3c9df66722e5fcba27cb41668f5bccee958cd979 | [log] [tgz] |
|---|---|---|
| author | Yuantian Tang <andy.tang@nxp.com> | Mon Apr 20 12:52:54 2020 +0800 |
| committer | Priyanka Jain <priyanka.jain@nxp.com> | Tue Apr 28 17:46:46 2020 +0530 |
| tree | 44867ef553c6001161d8cf55187bf8b0f306c256 | |
| parent | 6a8e9782bc05150d99f0d502792535b9560cdfd8 [diff] |
armv8: ls1046ardb: update the DIMM WRLVL_START value The WRLVL_START values are optimized for old DDR MTA18ASF1G72AZ. Update DDR struct to set new WRLVL_START values so that the new DIMM MTA18ADF2G72AZ get optimized and the old DIMM still works. Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>